# Publications

## 2017

Fast Modular Arithmetic on the Kalray MPPA-256 Processor for an Energy-Efficient Implementation of ECM
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IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, December 2017, 66(12), pages 2019-2030.

## 2014

Discrete logarithm in GF($2^{809}$) with FFS
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Hugo Krawczyk, PKC 2014 – International Conference on Practice and Theory of Public-Key Cryptography, LNCS. Buenos Aires, Argentina, 2014. Springer.

## 2013

Relation collection for the Function Field Sieve
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Alberto Nannarelli and Peter-Michael Seidel and Ping Tak Peter Tang, ARITH 21 – 21st IEEE International Symposium on Computer Arithmetic, ARITH 21, pages 201-210. Austin, Texas, United States, April 2013. IEEE.

## 2012

Finding Optimal Formulae for Bilinear Maps
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Ferruh Özbudak and Francisco Rodríguez-Henríquez, International Workshop of the Arithmetics of Finite Fields, number 7369 in Lecture Notes in Computer Science. Bochum, Germany, July 2012.

Finding Optimal Formulae for Bilinear Maps
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Unpublished presentation, AriC Seminar, Lyon, France, March 2012.

Optimal Eta pairing on supersingular genus-2 binary hyperelliptic curves
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Orr Dunkelman, Cryptographer’s Track at the RSA Conference 2012 (CT-RSA 2012), pages 19. San Francisco, United States, February 2012. Springer.

## 2011

Fast architectures for the $\eta_T$ pairing over small-characteristic supersingular elliptic curves
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IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, February 2011, Special Section on Computer Arithmetic, 60(2), pages 266-281.
PDFBibTeX

Ballot stuffing in a postal voting system
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Revote 2011 – International Workshop on Requirements Engineering for Electronic Voting Systems, pages 27 – 36. Trento, Italy, 2011. IEEE.

## 2010

A low-area yet performant FPGA implementation of Shabal
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Alex Biryukov and Guang Gong and Douglas Stinson, 17th International Workshop on Selected Areas in Cryptography, SAC 2010, number 6544 in Lecture Notes in Computer Science, pages 99-113. Waterloo, Canada, August 2010. Springer.

Accelerating lattice reduction with FPGAs
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Michel Abdalla and Paulo S. L. M. Barreto, First International Conference on Cryptology and Information Security in Latin America (LATINCRYPT’10), number 6212 in Lecture Notes in Computer Science, pages 124-143. Puebla, Mexico, August 2010.

## 2009

Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers
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Christophe Clavier and Kris Gaj, 11th International Workshop on Cryptographic Hardware and Embedded Systems – CHES 2009, number 5747 in Lecture Notes in Computer Science, pages 225-239. Lausanne, Switzerland, September 2009. Springer.

## 2008

Algorithms and arithmetic operators for computing the $\eta_T$ pairing in characteristic three
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IEEE Transactions on Computers, Institute of Electrical and Electronics Engineers, November 2008, Special Section on Special-Purpose Hardware for Cryptography and Cryptanalysis, 57(11), pages 1454-1468.
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A comparison between hardware accelerators for the modified Tate pairing over $\mathbb{F}_{2^m}$ and $\mathbb{F}_{3^m}$
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Steven D. Galbraith and Kenneth G. Paterson, Second International Conference on Pairing-Based Cryptography – Pairing 2008, number 5209 in Lecture Notes in Computer Science, pages 297-315. Egham, United Kingdom, September 2008. Springer.

Fonctions élémentaires en virgule flottante pour les accélérateurs reconfigurables
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Techniques et Sciences Informatiquess, Editions Hermès, September 2008, Architecture des Ordinateurs, 27(6), pages 673-698.

## 2007

When FPGAs are better at floating-point than microprocessors
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Pre-print, September 2007.

Arithmetic Operators for Pairing-Based Cryptography
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Pascal Paillier, Ingrid Verbauwhede, 9th Invernational Workshop on Cryptographic Hardware and Embedded Systems – CHES 2007, LNCS 4727, pages 239-255. Vienne, Austria, September 2007. Springer.

Return of the hardware floating-point elementary function
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18th Symposium on Computer Arithmetic, pages 161-168. Montpellier, France, June 2007. IEEE.

A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic
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Journal of VLSI Signal Processing / J VLSI Sign Process Syst Sign Image Video Technol, Kluwer Academic Publishers, 2007, 49(1), pages 161-175.

## 2006

Parameterized floating-point logarithm and exponential functions for FPGAs
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Microprocessors and Microsystems: Embedded Hardware Design (MICPRO), Elsevier, February 2006, 31(8), pages 537-545.